Cadence University Program Member
This page contains information about the use of Cadence design tools in classes and research programs in the Electrical and Computer Engineering Department at Tufts University. Learn more about Cadence University Software Programs.
- EE103: Introduction to VLSI Design
The course introduces students to CMOS VLSI design techniques and modern CAD tools for chip design. Students work through a complete VLSI design flow with Cadence tools through a series of laboratory exercises and a final open-ended design project. Past projects have included ALUs, multipliers, USB controllers, and various encoders and decoders.
- EE147: Analog and Mixed Signal MOS Integrated Circuit Design
The course consists of four parts. The first part introduces the practical aspects of analog and mixed signal MOS IC design method and design considerations, examples of applications. The second part covers the details of the components models, layout and matching, basic circuit building blocks of current sources, gain stages, two stage opamp, advanced current source, opamp circuit, opamp designs, feedback, noise model and analysis. The third part covers the details of switched capacitor (SC) circuits from Z-transform, sample hold circuit, SC filters, SC gain circuit, noise and nonlinear effects in SC circuits. The last part introduces the fundamentals of data converters. Cadence laboratory exercises are integral part of the course.
- EE148: Silicon Radio Frequency IC Design I
The course deals with bipolar, CMOS and BiCMOS implementations of radio frequency circuits. There are associated laboratories where Electronic Design Automation (EDA) tool from Cadence will be used for circuit simulations. Students will learn from this course how to design low noise amplifiers, mixers, and other RF circuits widely used in RF industry.
- EE194-DOC: Devices and Circuits for Optical Communications
The course deals with the study of the technology, devices and circuits for optical communication system design. The focus of the course is on integrated circuit implementation. Cadence laboratory exercises and final projects will be used to design various building blocks for such systems.
Nanoscale Circuits and Integrated Circuits Lab
Principal Investigator: Dr. Sameer Sonkusale
The goal of the Nanolab is to pursue research and education in the area of integrated circuits and systems for sensing, processing, and communication of information with emphasis on implementation in submicron and nanoscale CMOS technology. Some projects include Data Converter Design, Sensors and Instrumentation, and Analog Low Power VLSI design.
Advanced Integrated Circuits and Systems Lab
Principal Investigator: Dr. Valencia Koomson
The Advanced Integrated Circuits and Systems Lab under Prof. Joyner conducts research in the general area of high performance integrated circuits, with a particular focus on analog and mixed-signal integrated circuits that interface with photonic elements for imaging, sensing, and wireless communications. The research work is interdisciplinary with collaborators in the physical and biological sciences.
Tufts Emerging Circuits and Systems (TECS) Lab
Principal Investigator: Dr. Marco Donato
The TECS Lab primary focus is to investigate design methodologies for energy-efficient and reliable system-on-chip architectures targeting emerging applications. Active projects include co-design methodologies for building specialized architectures for machine learning and embedded memory systems leveraging non-volatile technologies.
Dr. Sameer Sonkusale (ECE department)
Dr. Valencia Koomson (ECE department)
Dr. Karen Panetta (ECE department)
Dr. Mohammed Afsar (ECE department)
Dr. Mark Hempstead (ECE department)
Dr. Soha Hassoun (CS department)
The following tools from Cadence are frequently used at Tufts University. These tools are part of the Custom IC and Digital Design and Signoff solutions. To name a few, we use the Virtuoso Schematic Editor, Virtuoso Layout Suite, Virtuoso Analog Design Environment, Virtuoso Spectre Circuit Simulator, and Virtuoso Multi-mode Simulator. In addition, the Genus, Innovus and Tempus tools are used for SoC design in advanced CMOS technology nodes.
- Cadence Tutorial for IC 5.1.41 at Tufts University
- Cadence Tutorial for IC 6.1 Linux Version at Tufts University
- HSpice Tutorial at Tufts University
Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.
This webpage was last updated on August 23, 2021.